This patent claims the benefit of the filing date of its corresponding Korean Patent Application No. 01-20169, filed Apr. 16, 2001.
1. Field of the Invention
The present invention relates to a high-voltage semiconductor device, and more particularly, to a high-voltage semiconductor device having a high-breakdown voltage isolation region.
2. Description of the Related Art
In general, power devices have been widely used in various applications including inverters or converters for controlling motors, various power sources and switches. Power devices are typically driven and controlled by electronic circuits constructed of interconnected semiconductor devices and electronic elements. The functions of power devices and the driving and controlling of power devices are performed by low-voltage integrated circuits (ICs) of several tens of volts and high-voltage ICs of several hundreds of volts. Power devices and drive and control circuits are integrated on a single substrate in order to reduce the overall size of power ICs. Thus, a power IC includes both low and high voltage regions.
FIG. 1 is a layout diagram illustrating an example of a high-voltage semiconductor device for driving power devices such as power metal oxide semiconductor field effect transistors (MOSFETs) or insulated-gate bipolar transistors (IGBTs). Referring to FIG. 1, the high-voltage semiconductor device includes a low voltage region I and a high voltage region II surrounded by the low voltage region I. Only a portion of the low voltage region I is shown in FIG. 1. A high-breakdown voltage isolation region is disposed between the low and high voltage regions I and II. The high-breakdown voltage isolation region is provided to electrically separate the two regions I and II from each other and shift the level of a signal from the low voltage region I in order to transmit the signal to the high voltage region II. The high-voltage isolation region has a lateral double diffused MOS (DMOS) transistor formed in an n-type drift region 10 and a p-type isolation region 11.
Reference numerals 12 and 13 denote a p-type well region and an n-type drain region of the lateral DMOS transistor, respectively.
FIG. 2 shows electric field lines in a portion xe2x80x9cAxe2x80x9d of the high-voltage semiconductor device of FIG. 1. Referring to FIG. 2, an electric field is highly concentrated on edges of the drain region 13 of the lateral DMOS transistor and edges of the high voltage region II, in particular, two opposite edges Axe2x80x2 of the regions 13 and 11. This is because a spherical junction structure is formed on these edges. It is well known that an electric field is more concentrated at a region where a spherical junction is formed rather than a region where a planar junction or cylindrical junction is formed. The presence of a region where the electric field is dense significantly reduces a breakdown voltage and reduces the ruggedness of the device.
To solve the above problems, it is an objective of the present invention to provide a high-voltage semiconductor device having a high-breakdown voltage isolation region, which increases a breakdown voltage and improves the ruggedness of the device.
Accordingly, to achieve the above objective, the present invention provides a high-voltage semiconductor device having a low voltage region, a high voltage region, and a high-breakdown voltage isolation region. The high voltage region is surrounded by the low voltage region and has corner portions at one side thereof. The high breakdown voltage isolation region has an isolation region for electrically separating the low and high voltage regions from each other and a lateral double diffused metal-oxide-semiconductor (DMOS) transistor for transmitting a signal from the low voltage region to the high voltage region. In particular, a drain region of the lateral DMOS transistor is disposed between the corner portions of the high voltage region, and opposite edges of the corner portions of the high voltage region and drain region of the lateral DMOS transistor are curved. As such, the invention provides non-spherical junctions between corners of the drain and the high voltage region II
Preferably, the edges of the corner portions of the high voltage region and the edges of the drain region of the lateral DMOS transistor have a substantially constant radius of curvature.
In this invention, it is preferable that the lateral DMOS transistor has n-type conductivity, and the isolation region has p-type conductivity.